AT&T DEFINITY 7100 series Manual de usuario descargar pdf (Pagina 67)

CONTROL CIRCUIT PACKS

●

ISDN-PRI testing, which makes test calls that originate

and terminate loop-back tests on the ISDN facilities. It

provides bit and block error rate information that can be

used to indicate ISDN facility quality.

Memory (CPP1) (G3iV2 and G3rV2)

The CPP1 accommodates an additional 4 megabytes of DRAM and

2 megabytes of Flash ROM. The CPP1 includes byte parity and

has the same access time as the memory on the Processor circuit

pack.

Mass Storage System/Network Control UN332

(G3rV2)

Provides a small computer system interface (SCSI) between the

processing element and the mass storage system (MSS), which

consists of tape and disk drives. Provides network control for the

SPE. Terminates one end of the processor-multiplexed bus.

Memory TN770 (G3sV2, G3vsV2, G3iV2)

Contains system translations including addresses of equipment

connected to the switch through the port circuit packs and call pro-

cessing software. Provides 6 Mbytes of dynamic RAM with single-

bit error correction and double-bit error detection.

Memory TN1650B (G3rV2)

Provides 32 Mbytes of dynamic RAM. It has error detection and

correction circuitry to ensure information integrity and uses 4 Mbit

RAM chips.

1 2 ... 62 63 64 65 66 67 68 69 70 71 72 ... 110 111

Sin comentarios

AT&T DEFINITY 7100 series Manual de usuario Pagina 67